Question #43463

A series RLC circuit consists of a resistor $R = 100 \ \Omega$, an inductor $L = 1 \text{ H}$, and a capacitor $C = 100 \ \mu\text{F}$, driven by an AC voltage source $V(t) = 10 \sin(\omega t) \text{ V}$. Two ideal peak detectors are connected across the inductor and the capacitor to measure their respective voltage amplitudes, $V_{L,peak}$ and $V_{C,peak}$. The outputs of these detectors are fed into a digital logic circuit. Input A of a 2-input OR gate receives logic '1' if $V_{L,peak} \ge 11 \text{ V}$, and logic '0' otherwise. Input B of the same OR gate receives logic '1' if $V_{C,peak} \ge 11 \text{ V}$, and logic '0' otherwise. Let $Y$ be the Boolean output of the OR gate. Determine the sequence of outputs $(Y_1, Y_2, Y_3)$ at three driving frequencies: $\omega_1 = 50\sqrt{2} \text{ rad/s}$, $\omega_2 = 100 \text{ rad/s}$, and $\omega_3 = 100\sqrt{2} \text{ rad/s}$.